FPGA Hardware Engineer
Leidos
Columbia, MD 21045
Posted 9 months ago
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Job Type(s)
Full Time
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Industry
Engineering
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Job Description
FPGA Hardware Engineer
Description
Cyber and SIGINT Solutions is looking for a mid-level Hardware Design Engineer to work on a program in Linthicum, MD. This high performing program consists of a small team responsible for the full life-cycle of the design, programming, and testing of next generation cryptographic communications security modules that serve as the standard protecting data on both critical US and foreign ally data links. This hands-on engineering work covers the full life-cycle of hardware and software development, including requirements definition, design, implementation using FPGAs and embedded software, device testing and system integration support. The modules developed undergo Information Assurance certification documentation and testing prior to embedment in a variety of system applications including helicopters and UAVs.
Primary Responsibilities
Day-to-day responsibilities include:
- Assisting with designing new products and processes and improving and maintaining existing products
- Communicating with the other engineering personnel to coordinate the interrelated design and assure project completion
- Conducting design analysis on components and assemblies to assist in the development process by ensuring designs are cost efficient, able to be manufactured, and reliable
- Applying ASIC or FPGA place and route (P&R) tools with various libraries to create physical implementations of designs
- Developing and maintain documentation for the P&R design flows
- Assisting with de-processing electronic components and retrieving stored firmware or software
- Designing new products and processes and improving and maintaining existing products
- Working with tool and library vendors to develop solutions for designers P&R design challenges
- Integrating new P&R tools, P&R tool updates, and ASIC or FPGA design libraries into Governments computer aided design environment, documents the use of those tools and libraries, and Assist other physical designers to successfully complete their specific P&R design tasks
- Leading the designs of new products and processes and improve and maintain existing products
- Providing technical leadership to less experienced engineers
CLEARANCE REQUIRED: Active TS/SCI w/ Polygraph. Must be US Citizen
Basic Qualifications
- Minimum of Seven (7) years experience as a HDE in integrated circuit or microelectronic component design is required.
- Bachelors degree in Electrical Engineering or Computer Engineering from an accredited college or university is required. Five (5) years of additional hardware design engineering experience may be substituted for a bachelors degree.
Six (6) years experience in at least five (5):
- FPGA design
- Xilinx's Vivado
- Microblaze Design Suite
- Partial Reconfiguration
- Very High Speed Integrated Circuit (VHSIC)
- Hardware Description Language (VHDL)
- Low Voltage Differential Signaling (LVDS)
- High Speed Serdes (HSS).
Development of security products within the Cyber Intelligence field is highly sought
Original Posting Date:
2023-09-28While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.
Pay Range:
Pay Range $101,400.00 - $183,300.00The Leidos pay range for this job level is a general guideline onlyand not a guarantee of compensation or salary. Additional factors considered in extending an offer include (but are not limited to) responsibilities of the job, education, experience, knowledge, skills, and abilities, as well as internal equity, alignment with market data, applicable bargaining agreement (if any), or other law.
Original Posting Date:
09/28/2023While subject to change based on business needs, Leidos reasonably anticipates that this job requisition will remain open for at least 3 days with an anticipated close date of no earlier than 3 days after the original posting date as listed above.