FPGA VALIDATION ENGINEER (RF) – ROCHESTER, NY WITH SECURITY CLEARANCE
Enterprise Consulting Services DBA Enterprise Peak
Rochester NY 14602 US
OUR PROJECT
Immediate opportunity to join our team and developing cutting-edge communications systems. This is a long-term contract position that will be on a 9/80 schedule onsite at our Rochester, NY facility. You can expect competitive pay with healthcare benefits included. WHO WE ARE LOOKING FOR We are looking for a FPGA Validation Engineer to join our team delivering a cutting-edge communications system. You will be responsible for developing and verifying Xilinx and Lattice FPGAs utilizing UVM methodology (UVMF). 5+ years of experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products with Radio Frequency is required. Expertise with multi-clock domain design and power optimization for handheld systems is a desired. Experience working with TCP/IP, UDP/IP, and Ethernet protocols is a plus. This is a fantastic opportunity to join a growing team delivering new technologies. We are interviewing qualified candidates immediately and will move into the offer stage quickly. If you are interested, please apply with an updated resume. QUALIFICATIONS • 5+ years of RF Circuit Design and Multi-Clock Domain Design • 2+ years of Experience working with the Vivado Design Suite (Xilinx) • Experience delivering V&V with UVM Methodology (UVMF)
• Experience with TCP/IP, UDP/IP, and Ethernet protocols a plus Effective written and verbal communication skills are absolutely required for this role. You must be able to work LEGALLY in the United States as NO SPONSORSHIP will be provided. NO 3rd PARTIES.
Immediate opportunity to join our team and developing cutting-edge communications systems. This is a long-term contract position that will be on a 9/80 schedule onsite at our Rochester, NY facility. You can expect competitive pay with healthcare benefits included. WHO WE ARE LOOKING FOR We are looking for a FPGA Validation Engineer to join our team delivering a cutting-edge communications system. You will be responsible for developing and verifying Xilinx and Lattice FPGAs utilizing UVM methodology (UVMF). 5+ years of experience developing, implementing, and verification of high-performance communications/networking ASIC/FPGA products with Radio Frequency is required. Expertise with multi-clock domain design and power optimization for handheld systems is a desired. Experience working with TCP/IP, UDP/IP, and Ethernet protocols is a plus. This is a fantastic opportunity to join a growing team delivering new technologies. We are interviewing qualified candidates immediately and will move into the offer stage quickly. If you are interested, please apply with an updated resume. QUALIFICATIONS • 5+ years of RF Circuit Design and Multi-Clock Domain Design • 2+ years of Experience working with the Vivado Design Suite (Xilinx) • Experience delivering V&V with UVM Methodology (UVMF)
• Experience with TCP/IP, UDP/IP, and Ethernet protocols a plus Effective written and verbal communication skills are absolutely required for this role. You must be able to work LEGALLY in the United States as NO SPONSORSHIP will be provided. NO 3rd PARTIES.